Integrated Capacitor Busbar Optimization: A Case Study on Design and Simulation for Achieving Low Inductance in EV Power Modules

In the power conversion system of electric vehicles, the parasitic inductance of the connection loop between the power module (such as IGBT) and the DC link capacitor is a key parameter affecting system efficiency, switching loss, and electromagnetic interference (EMI). Reducing this loop inductance is crucial for enhancing power density and reliability. This article presents a case study based on Anjie Tech's simulation and design optimization for a specific EV project. By comparing the magnetic field distribution and parasitic inductance parameters before and after optimization, it demonstrates a design solution that effectively reduces the overall loop inductance to 9nH through structural innovation, significantly improving system performance.

1. Background and Challenges

With the increasing demands for power density and efficiency in electric vehicle powertrains, the switching speed of power modules continues to rise. However, the parasitic inductance present in the connection loop between the power module and the DC link capacitor causes significant voltage overshoot and oscillation during high-speed switching. This not only increases switching losses and device stress but also presents severe EMI challenges. Therefore, minimizing the parasitic inductance of this loop has become a core objective in power electronics integration design.

In traditional connection schemes, the structure between the connector and the power terminals often contains areas of high magnetic flux density, making it difficult to further reduce loop inductance. In the initial design of this case, both simulation and physical measurements indicated that the overall loop inductance measured using the double-pulse test method after connecting the IGBT module was 21nH, which did not meet the customer's expectations for higher system performance.

2. Initial Design Analysis and Problem Identification

By performing electromagnetic field simulation on the initial design, the main source of parasitic inductance can be clearly identified. The simulation results show that the area with the highest magnetic flux density is concentrated at the connection between the IGBT power terminals and the capacitor core. Specifically, in the IGBT terminal area, the connection structure failed to achieve effective magnetic flux cancellation (i.e., insufficient overlap of the positive and negative current loops), creating a high magnetic reluctance path. This area became the primary contributor to the parasitic inductance of the entire loop. This analysis result aligns with the 21nH loop inductance obtained from the double-pulse test, pinpointing the key area that the optimization design needed to focus on.

3. Optimization Design and Simulation Verification

Based on the above problem analysis, the core idea of the optimization design is to reconstruct the current path to enhance the magnetic flux cancellation effect between the positive and negative busbars, thereby reducing loop inductance. The design team proposed an innovative connector structure solution.

1. Post-Optimization Simulation Analysis: After performing electromagnetic simulation on the new design, it was found that the magnetic flux density in the IGBT terminal area was significantly reduced. The new structural design makes the current loop more compact, and the magnetic field coupling between the positive and negative conductors is tighter, effectively canceling the parasitic inductance.

2. Key Parameter Comparison: The simulated parasitic inductance values of the optimized integrated capacitor busbar are only 4.2 nH at 100 kHz and 3.8 nH at 1 MHz (taking terminal model 882657-001-00 as an example). This represents the parasitic inductance of the busbar itself. More importantly, system-level verification yielded significant results.

3. System-Level Performance Improvement: The optimized integrated capacitor busbar was physically connected to the IGBT module and verified again using the double-pulse test method. The measured results show that the parasitic inductance of the entire power loop was significantly reduced from the initial 21nH to 9nH. This change fully met the customer's expected target, meaning the power module will experience lower voltage stress and losses during switching, leading to substantial improvements in system efficiency and reliability.

4. Conclusion

This study, through a specific engineering case, demonstrates that targeted low-inductance design of the connection components between the power module and the capacitor is crucial for high-frequency, high-power applications in EV powertrains. By using electromagnetic simulation to accurately locate parasitic inductance hotspots and applying innovative thinking to optimize the physical structure to enhance magnetic flux cancellation, the system loop inductance can be effectively reduced by more than 50%. Anjie Tech's optimization design of the integrated capacitor busbar in this case successfully reduced the loop inductance to 9nH, providing an effective solution for the development of next-generation high-performance, high-power-density electric vehicle powertrain systems, showcasing advanced design and simulation capabilities in the field of power electronics integration.

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simulation and design optimization for a specific EV project. By comparing the magnetic field distribution and parasitic inductance parameters before and after optimization, it demonstrates a design solution that effectively reduces the overall loop inductance to 9nH through structural innovation, significantly improving system performance.